FPGA solution for SPAUI to SPI4.2

Lattice Semiconductor and Dune Networks, a provider of networking devices for Data Center, Enterprise and Carrier Ethernet scalable switching platforms, will collaborate in the development and marketing of SPAUI-based networking solutions. LatticeSCM FPGAs provide a programmable platform to bridge to switch fabrics and traffic managers by utilizing hardened Ethernet and SPI4.2 blocks implemented via exclusive Masked Array for Cost Optimization (MACO) technology.

 Dune Networks’ FAP traffic managers provide ingress and egress programmable traffic management solutions that address the requirements of the MEF, IETF DiffServ, and DSL Forum TR-059/TR-101. SPAUI is a serial interface based on the10GbE XAUI and SPI4.2 standards. By combining the benefits of both into one comprehensive standard, SPAUI enables system designers to take advantage of the ubiquity of XAUI as a physical layer as well as the multi-channel QoS and flow control mechanisms of SPI4.2. SPAUI is also designed to support aggregate rates of higher speeds. SPAUI is one of the interface options of Dune Networks’ SAND chipset. When implemented in a LatticeSCM-15E FPGA in a 256 fine pitch Ball Grid Array (fpBGA) package, the Lattice XAUI to SPI4.2 bridging solution requires a mere 17mm x 17mm on a printed circuit board while consuming 2.5Watts of power.

 About SPAUI

SPAUI, an interface based on the XAUI industry standard, incorporates several extensions that provide 10Gbps applications with speedup (for packet headers, full rate 12GE), channelization, packet interleaving and refined flow control. SPAUI is implementation-friendly, backward compatible to standard XAUI and ideal for dense 10GE and higher speed Ethernet solutions. The SPAUI memorandum is available upon request from Dune Networks at no cost.