The 1.5-volt ProASIC3 A3P015 device offers up to 350 MHz system performance, 49 I/Os, and 1 Kb of nonvolatile Flash ROM. The FPGAs offer the ability to bridge between two different I/O voltages levels and 1 Kb of on-chip memory, potentially eliminating the need for discrete devices. Used in the ProASIC3 and IGLOO architectures, a Versatile core cell is automatically used as combinatorial or sequential logic by the Actel Libero Integrated Design Environment (IDE), enabling more efficient routing, flexibility and device utilization when compared with fixed-architecture CPLD solutions.
Pricing and Availability
The IGLOO AGL015 and ProASIC3 A3P015 FPGAs will sample in March with volume production in Q2 2008. The devices are offered in 8x8 mm single-row quad flat no-lead (QFN) packages. The devices are supported by the Actel Libero IDE v8.2 SP1. Device pricing starts at $0.99 for the A3P015 and AGL015 devices in volume.
Source: www.channel-e.biz