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PEZY adds 64-bit MIPS for energy-efficient supercomputing

 
Electronics News
9 years ago

PEZY adds 64-bit MIPS for energy-efficient supercomputing


PEZY Computing has announced it is working on a MIPS64-based PEZY-SC2 family of many-core chips for supercomputers and HPC applications that will scale up to 4096 processing nodes.

The 64-bit MIPS CPUs will act as the host processors for the system, making PEZY-SC2 the first generation of 64-bit HPC processors from the Japanese company.

PEZY is a fabless startup focusing on compute-intensive, highly parallel applications. The company occupies the top three spots on the Green500 list of energy-efficient HPC makers, setting a world record with the Shoubo supercomputer that consumes 7W per GFLOPS.

The MIPS architecture provides many features for HPC applications, including hardware multithreading (up to four threads per CPU), 128-bit SIMD, and full hardware virtualisation (up to 255 guest operating systems). The company says; hardware multithreading is very important since many-core chips prefer to use in-order execution cores and rely on multithreading to avoid stalling.

Author
Tom Austin-Morgan

Source:  www.newelectronics.co.uk


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