Archive : 12 March 2015 год

Silicon Labs and ARM are working together deliver power management application programming interfaces (APIs) for ARM mbed platforms. According to the companies, the APIs will enable the mbed community to optimise their designs for energy efficiency and longer battery life.

Zach Shelby, ARM's vice president of IoT business marketing, said: "This is an important step toward enabling full energy awareness in IoT devices and is one of the key building blocks for mbed OS that is due for public release later this year."

The APIs will enable a new feature on Silicon Labs' EFM32 Gecko MCUs. This will determine the optimal sleep mode based on the MCU peripherals in use. Silicon Labs says automatic selection of the optimal sleep mode, combined with low energy, autonomous MCU peripherals, is likely to reduce the energy consumption of IoT applications significantly and with minimal design effort.

Daniel Cooley, general manager of Silicon Labs' MCU and wireless products, added: "We're excited to help deliver the industry's first low power mbed platform, which will play a key role in accelerating the deployment of countless battery powered IoT applications."

Silicon Labs plans to provide mbed enabled EFM32 Gecko starter kits in April 2015.

Author
Graham Pitcher

Source:  www.newelectronics.co.uk

A new communications technology developed by IBM Research and Semtech is said to offer 'significant advantages' over cellular networks and Wi-Fi when it comes to M2M communications.

The technology, called LoRaWAN – Long Range wide-area networks – taps the unlicensed wireless spectrum, allowing sensors to communicate over long distances. The partners claims LoRaWAN supports 'optimal battery life' and add that it requires minimal infrastructure.

"The Internet of Things is already changing our world," said Dr Thorsten Kramp, pictured, Master Inventor at IBM's Zurich Research Laboratory. "Technology advancements like [this] will help to advance that vision by extending the reach, range and longevity of sensors that make up an intelligent world."

LoRaWAN sensors are said to communicate at rates of up to 100kbit/s over more than 100km in favourable environments and over more than 2km urban environments. This is said to make the approach suited to sending small amounts of data, such as GPS coordinates and climate readings, where broadband is not available.

Looking to support LoRaWAN technology, IBM, Semtech and other companies have set up the LoRa Alliance. This aims to combine hardware and software based on the LoRaWAN standard for telecom operators and network operators, enabling them to offer IoT services to both businesses and consumers.

Author
Graham Pitcher

Source:  www.newelectronics.co.uk

Infineon has introduced the OptiMOS 5 product family of 25V and 30V devices, including power MOSFETs in standard discrete packages, a new class of power stages named Power Block and in an integrated power stage called DrMOS 5x5.

According to the company, efficiency improvements of around 1% have been made across the whole load range compared to the previous generation, with a peak efficiency in excess of 95% claimed when the devices are used in a typical server voltage regulator design. Improved performance is said to be based on the reduction of switching losses by 50% compared to previous OptiMOS technology.

"With the significant reduction in switching losses, OptiMOS 5 products allow engineers to operate their designs at higher switching frequencies, reduce energy consumption and save overall system costs," said Richard Kuncic, general manager of Infineon's Power Management and Multimarket business.

The OptiMOS 5 product family is available in SuperSO8 and S3O8 packages, which support industry standard footprints. With an on state resistance of 1.3 m? at 10V, the company says a 'best in class' product can be realised in a 3.3 x 3.3mm package, board space requirements in high power, high density designs.

OptiMOS 5 MOSFETs are also used in the new half bridge device, called Power Block, and DrMOS 5x5 products. The MOSFET technology improves performance relevant parameters, such as FOMg or FOMgd by more than 30% and reduces power losses. These improvements allow designers to increase overall system efficiency and to operate at higher switching frequencies, optimising system costs and reducing energy consumption

Power Block is a leadless SMD package comprising the low side and high side MOSFETs in a synchronous DC/DC converter into a 5 x 6mm package. The small package outline and the interconnection of the two MOSFETs within the package are said to minimise loop inductance.

OptiMOS 5 25V is also used in a power stage which integrates DrMOS 5x5, a driver and two MOSFETs into a package measuring 5 x 5mm.

Author
Graham Pitcher

Source:  www.newelectronics.co.uk

As part of a major project which aims to build on the legacy of the BBC Micro, the BBC plans give a personal coding device to every child across the country starting secondary school in September 2015.

The device, which is still in development, is currently called Micro Bit. The BBC says it will be a small, wearable device with an LED display that can be programmed in a number of ways. The standalone, entry level coding device will allow children to pick it up, plug it into a computer and start creating with it.

Early feedback from teachers has shown that it encourages independent learning, gives pupils a strong sense of achievement and can inspire those who are not usually interested in computers to be creative with it.

More than 25 partners are involved in project, including ARM, Freescale, Nordic Semiconductor and Samsung.

Simon Segars, ARM's chief executive, said: "Technology is now as much a part of childhood as riding a bicycle or kicking a football but going from user to innovator is something we still need to encourage. The BBC and Acorn Computer, where ARM technology was first created, came together 35 years ago to develop the BBC Micro and that inspired the engineers now at the forefront of shaping our increasingly connected world. The new BBC Micro Bit has even greater potential because it can inspire boys and girls toward a career in technology at a time of unprecedented demand for science and engineering skills across all areas of the global economy."

Author
Graham Pitcher

Source:  www.newelectronics.co.uk

Although multicore processors have been available for some years, methods that allow software to take advantage of multicore processing have been slow to evolve. Looking to address the issue, computer scientists from Saarland University say they have developed a tool that parallelises code sections automatically, whilst giving developers programming advice. In the long term, they add, the Sambamba system could parallelise any given program automatically.

"Multicore architectures are becoming more and more important, even in netbooks and mobile phones," says Andreas Zeller, professor of software engineering. "While devices are shrinking, they are also optimised to use as little energy as possible, which makes multicore even more necessary." Sambamba automatically converts conventionally programmed code into code that can be executed in parallel. "The aim is to find several parallelization options for every individual function in the examined application, and then select the best one during runtime," says Sebastian Hack, professor of programming at Saarland University.

Sambamba consists of two modules: a program analysis tool that examines code for its parallelisation potential before runtime; and a second module that can use these results and optimise the code with additional information obtained at runtime.

"Even if we were to construct a kind of translator application that has mastered every single technique ever devised and tested, we would still be lacking the type of cost model that can determine the best method in each case automatically," said Prof Hack. The integrative technique tries to gather as much information as possible in advance, then collects additional information during the runtime. In this way, says the team, additional parallelisation opportunities can be exposed and the program can 'learn' which method works best.

Sambamba is said to work well for programs written in languages like C++ that are popular, but hard to analyse. But the more complex the program, the more important the analysis at runtime becomes. "Sambamba can parallelise code entirely automatically," Prof Zeller concluded. "But, in some cases, developers might want to verify different options, or choose one themselves. So our system can also communicate with the user and make suggestions on how to parallelise the code."

Author
Graham Pitcher

Source:  www.newelectronics.co.uk

SoCs for critical applications could use 28% less energy and 48% less chip area while offering hardware failure rate nine times lower, if they were designed using the Desyre architecture, according to the European project. The result, the project adds, would reduce hospital costs and replacement rate of medical devices drastically.

The DeSyRe (on-Demand System Reliability) project was established to examine the development of extremely reliable medical devices. It initially promised new design techniques that would counter the increasing fault rates expected for SoCs manufactured on next technology nodes.

Desyre's approach sees an SoC split into two parts. One part accommodates interchangeable processing cores which, the project says, are fault prone by nature. The other part is fault resistant and monitors the 'sanity' of cores in the first area. According to the project, it assures that each core in that area can handle an assigned task correctly and efficiently, transferring tasks to idle cores in case of a malfunction.

"We have coupled a new dynamically reconfigurable substrate together with runtime-system software support in such a manner that it can adapt on demand to various types and densities of faults, system constraints and application requirements," said Ioannis Sourdis, Associate Professor in Computer Engineering at Chalmers University of Technology and leader of the Desyre project. "We compared the Desyre architecture to prevailing reliability approaches and Desyre scored better on all aspects. It even scored better than we planned at the start of the project."

When compared to a standard Triple Modular Redundancy (TMR) system, an SoC developed using the Desyre approach required 46% less chip area and 28% less energy to achieve the same tolerance to transient faults and the same performance as a typical TMR system. When compared to a time redundant system, Desyre SoCs were said to execute code between 14% and 32% more quickly.

When looking at permanent faults and comparing the Desyre system with a core redundant system of the same area, Desyre reduced the number of failures in a billion device hours (FIT) by a factor of nine.

"We expected that Desyre would reduce the FIT by about 40% at most, and were very pleased to reach a reduction in the number of failures by more than a factor of nine," asserts Riccardo Mariani, CTO of project partner Yogitech. "The Desyre techniques were created for extremely reliable medical SoCs, but their use is not limited to that market. I expect Desyre like systems to be in our future cars – for instance in self driving cars – as we design automotive SoCs with ever more fail safe and fail operational measures to meet the strict functional safety standards."

Author
Graham Pitcher

Source:  www.newelectronics.co.uk

Scientists in Japan believe perovskites have the potential to improve the fabrication of electrodes and wiring in devices such as multilayer ceramic capacitors, as well as spark plugs.

Such devices are composed of oxides and metals – the oxides provide the product's electric, optical or magnetic properties, while the metals are used in electrodes. Fabricating these products is difficult because the physical properties of the oxides and metals are very different and the manufacturing process needs to account a range of factors.

The scientists have investigated the potential of replacing metal electrodes in ceramic based electronics with conductive oxides. Doing so, says the team, could allow for more innovations in the ceramics industry. Oxide electrodes in these ceramic based products would need to be highly conductive (more than 1000Siemens/cm) and stable in air at temperatures of up to 1173K.

The research team, from NGK Spark Plug and Nagoya University, fabricated oxides that have the potential to replace metal electrodes and investigated their physical properties at elevated temperatures. Lanthanum based perovskites were chosen as having a potential for industrial use because they do not contain expensive rare metals, they are not environmentally hazardous, and they are stable in air up to 1173K.

Based on their investigations, the team found the perovskite type oxide LaCo0.5Ni0.5O3 showed high electronic conduction at high temperatures in air and was suitable for the fabrication of oxide electrodes and wiring in ceramic based products.

Author
Graham Pitcher

Source:  www.newelectronics.co.uk