Archive : 28 September 2009 год

Analog Devices introduced a dual-channel, 1.2-GSPS (giga-sample-per-second), 16-bit DAC (digital-to-analog converter) that supports the high data rates and complex modulation schemes required for advanced multi-carrier wireless and broadband communications equipment throughout the world. Featuring an on-chip 32-bit NCO (numerically-controlled oscillator) that allows flexible placement of the IF (intermediate frequency) to help optimize system performance, ADI’s AD9122 DAC satisfies requirements for multi-standard cellular base stations and other applications that use sophisticated DPD (digital pre-distortion) techniques demanding broad signal bandwidths.

 The wireless communications standards that the AD9122 supports include GSM, WCDMA, TD-SCDMA, CDMA2000, WiMAX, and LTE. The combination of the AD9122 dual DAC and ADI’s ADL5375 quadrature modulator and AD9516 14-output clock generator meets or exceeds six multi-carrier GSM specifications for IMD (intermodulation distortion) and SNR (signal-to-noise ratio). This signal chain is available as an evaluation board.

 1.2-GSPS LVDS Interface

The AD9122 LVDS (low-voltage differential signaling) interface with an eight-word-deep FIFO (first-in, first-out) memory supports a maximum sample-data-input-rate of 1.2 GSPS and 600 MSPS (mega samples per second) per DAC to support signal bandwidths up to 400 MHz in advanced DPD transmitter architectures. The data interface supports word, byte, and nibble load allowing customers to reduce input pins on lower data rates to save board space, power and cost. The AD9122 includes an improved on-chip PLL (phased-locked loop) with lower jitter and phase noise. Operating with the on-chip PLL at a DAC output frequency of 150 MHz, the AD9122 delivers a 76-dB ACLR (adjacent-channel leakage ratio) for single-carrier WCDMA applications.

 For the most demanding wireless communications applications, the AD9122 can achieve 83-dBc ACLR using an external PLL. The device includes integrated interpolation filters with selectable interpolation factors of 2, 4, and 8. The dual DAC also integrates 32-bit NCOs and is available in a space-saving 72-pin LFCSP (lead-frame chip-scale package) that is 50 percent smaller than previous generation DACs. DAC Data Pattern Generator Tool Available ADI’s Data Pattern Generator (DPG2) is a bench-top instrument for driving vectors into Analog Devices' high-speed digital-to-analog converters.

 The DPG2 connects to a PC over USB and allows a user to download a vector from their PC into the DPG2’s internal memory. Once downloaded, the DPG2 can run the vector at full speed via an attached evaluation board for a specific DAC. This allows for rapid evaluation of the DAC with both generic and customer-generated test data.

Source: www.channel-e.biz