Cadence has unveiled the 11th generation of Tensilica's Xtensa processor. The Xtensa LX6 and Xtensa 11 processors feature architectural improvements that are said to allow users to create custom processor instruction sets with up to 25% less processor logic power consumption and up to 75% better local memory area and power efficiency.
"These latest improvements put the Tensilica processors even further ahead of all other processor cores on the market that claim to offer configurability," said Jack Guedj, corporate vice president of Tensilica products at Cadence.
Enhancements in flexible length instruction extensions (FLIX) for Xtensa LX6 allow for very long instruction word (VLIW) instructions from 4 to 16byte. This, says Cadence, results in code size savings of up to 25% compared to prior Xtensa versions. Also included is an option for run time power down of portions of cache memories, which is said to bring local memory power savings of up to 75%. Other features include more efficient data cache block prefetch and reduced dynamic switching power.
Author
Graham Pitcher
Source: www.newelectronics.co.uk