Altera and IBM have developed an FPGA based acceleration platform that connects an FPGA coherently to a POWER8 CPU via IBM's Coherent Accelerator Processor Interface (CAPI). By sharing virtual memory between the FPGA and processor, the reconfigurable hardware accelerator is said to improve system performance, efficiency and flexibility in high performance computing and data centre applications.
"Our work with the OpenPOWER Foundation has enabled us to deliver highly flexible heterogeneous compute platforms that target Power based systems," said David Gamba, senior director of Altera's computer and storage business unit. "Altera is at the forefront of supplying Power users reconfigurable hardware accelerators based on CAPI that are supported with an OpenCL programming model. The result is highly optimised accelerators that deliver optimal FLOPs/Watt/dollar."
According to the partners, by using CAPI to attach FPGA accelerators coherently to the fabric of a POWER8 processor and main system memory, the FPGA appears to be another POWER8 processor core.
The move is supported by the Altera SDK for OpenCL, which allows developers to develop custom FPGA based accelerators.
Meanwhile, Nallatech has created an OpenPOWER CAPI Development Kit for POWER8 that features its 385 card, pictured, said to be the first CAPI FPGA accelerator card.
Author
Graham Pitcher
Source: www.newelectronics.co.uk