Following the launch last year of the I6500 CPU core, Imagination Technologies has unveiled a scalable 64bit MIPS multiprocessing solution that meets the functional safety requirements of ISO26262 and IEC61508.Following the launch last year of the I6500 CPU core, Imagination Technologies has unveiled a scalable 64bit MIPS multiprocessing solution that meets the functional safety requirements of ISO26262 and IEC61508.
The I6500-F is said to provide a high performance, efficient backbone for many-core designs in a range of applications, with the ability to create up to 64 heterogeneous clusters of multithreaded multicore MIPS CPUs and other accelerators.
Imagination is looking at the automotive sector, in particular. Tim Mace, business development manager with the MIPS business unit, said: “Auto manufacturers are looking to consolidate resources in a central server. This multicore, multicluster CPU is good for that. In order to meet ISO26262 requirements, an autonomous system needs to perform to ASIL-D levels. This requires a proper process and methodology to make sure the IP works correctly.”
According to Mace, the core has been designed for Safety Element out of Context applications. “We chose to design the I6500-F for this as it allows us to address other customers and applications with the same product.” Imagination’s lead customer is Mobileye, whose EyeQ 5 SoC will feature the I6500-F CPU, targeted at a 7nm FinFET proces.
Author
Graham Pitcher
Source: www.newelectronics.co.uk