Intel has revealed that it is starting to sample its Stratix 10 FPGA, which uses the company’s 14nm tri-gate (finfet) process.Intel has revealed that it is starting to sample its Stratix 10 FPGA, which uses the company’s 14nm tri-gate (finfet) process.
“Stratix 10 combines the benefits of Intel’s 14nm tri-gate process technology with a revolutionary new architecture called HyperFlex, meeting the performance demands of high-end compute and data-intensive applications ranging from data centres, network infrastructure, cloud computing, and radar and imaging systems,” said Dan McNamara, vp and general manager of the Programmable Solutions Group at Intel.
According to McNamara benefits over the last generation of Stratix include: 2x core performance; 5x the density; up to 70% lower power than Stratix V (equivalent performance); up to 10 TFlops single-precision floating point DSP; up to 1 Tbit/s memory bandwidth with integrated HBM2 (high-bandwidth memory) in-package and Quad-core 64bit ARM Cortex-A53.
McNamara said that Intel sees Stratix 10 as accelerator hardware for data centres and networking.
“As a user’s system demands or hardware requirements change, the FPGA can be reconfigured to accelerate individual tasks, which translates into significant improvements in system-level performance and power efficiency," he explained.
According to McNamara the growing number of bandwidth-intensive applications is creating a massive increase in customer demand and is putting increased pressure on network infrastructures.
"Cisco forecasts that by 2020, nearly a million minutes of video content will cross the network each second, and that by 2020, the number of devices connected to IP networks will be three times the global population.
“Stratix 10 FPGAs will enable network innovations across the access, transmission and networking equipment arenas to aggregate, transport and deliver the triple-play traffic over converged multiservice networks,” McNamara said.
Author
Neil Tyler
Source: www.newelectronics.co.uk