Cadence has unveiled its next-generation Virtuoso platform providing designers with significant performance and capacity improvements across the platform. New technologies within the Virtuoso Analogue Design Environment (ADE) and enhancements to the Virtuoso Layout Suite have been added to address changing requirements for automotive safety, medical device and Internet of Things (IoT) applications.
The Virtuoso ADE product suite looks to address challenges that have arisen with the emergence of new industry standards, advanced-node designs and the requirements for system design, enabling engineers to explore, analyse and verify their designs while ensuring that the design intent is maintained throughout the design cycle. Enhanced data handling provides up to 20X improvement in loading waveform databases in excess of 1GB and a 50X improvement in versioning and loading set-up files into the environment.
In terms of usability features have been designed to be easily assessable without, as Cadence says, “being intrusive”. The platform technologies have been made simple to set up and manage and can automate multiple testbenches and regressions.
The suite’s key technologies include:
Virtuoso ADE Explorer: enables fast and accurate real-time tuning of design specs, provides pass/fail datasheets and delivers a complete corners and Monte Carlo statistical environment for detecting and fixing variation problems
Virtuoso ADE Assembler: enables engineers to analyse designs under various process-voltage-temperature (PVT) combinations; also offers GUI-based verification plans so designers can easily create conditional and dependent simulations
Virtuoso ADE Verifier: Provides a substantial technological advancement in analogue verification, offering an integrated dashboard that lets engineers easily verify that all of the blocks are contributing to the overall design specifications
"For the first time Cadence is offering a Virtuoso platform-based circuit verification environment that is able to provide the starting point to bring a formal method to design verification of analogue components," explained Steve Lewis, Product Management Director, Analog/Custom Marketing at Cadence.
Pre-launch users have found that by using the Virtuoso ADE product suite, they have been able to improve analogue IP verification productivity by as much as 30 percent and have been able to significantly reduce verification issues.
The Virtuoso Layout Suite is able to address very complex layout challenges by offering accelerated performance and productivity for custom analogue, digital and mixed-signal designs at the device, cell, block and chip levels.
Enhancements to the platform include: improved graphic rendering (10X to 100X accelerated zoom, pan, drag and draw performance on large layouts); a Module Generator (ModGen) that provides an interactive pattern manipulation flow that makes real-time customisation of ModGens very visual and simple and which also supports synchronous clones, which are layout elements with identical physical properties, that the layout designer can layout once and reuse and, finally, new structured device-level routing (structured device-level routing capabilities can enhance routing productivity by as much as 50 percent).
Commenting Tom Beckley, senior vice president and general manager, Custom IC & PCB Group at Cadence said, “The need to do custom design has never been greater, and increasing complexity is driving the need to further simplify the design process so our customers can meet design schedules. The delivery of our next-generation Virtuoso platform will enable fast, accurate custom design. Analogue electrical design verification is now an industry reality.”
Author
Neil Tyler
Source: www.newelectronics.co.uk