Synopsys has launched Custom Compiler, a design solution intended to close what the company calls a FinFET productivity gap.Synopsys has launched Custom Compiler, a design solution intended to close what the company calls a FinFET productivity gap.
Dave Reed, director of marketing for Synopsys’ mixed signal and analogue group, noted that, as companies move to FinFET based designs, productivity has declined by up to a factor of three. “Companies are moving to FinFET based designs, but as they move, they get an ‘eye opening’ experience,” he said.
While analogue functionality isn’t necessarily suited to FinFET transistors, Reed said the trend towards SoCs meant analogue designers were compelled to use the latest process nodes.
“FinFETs have complicated series and parallel stacks,” he pointed out. “Because layout is inflexible, the cost of mistakes is high and there is a threefold increase in layout effort. The productivity gap is becoming an important issue to solve.”
Looking to address the issue, Synopsys has developed what it calls visually assisted automation technologies that are intended to speed common design tasks, reduce iterations and enable reuse.
Custom Compiler features four so called Assistants: graphical based productivity aids that are familiar to layout designers and which avoid the need to write code and constraints.
Layout Assistants provide visually guided automation of placement and routing and are said to be suitable for connecting FinFET arrays or large-M factor transistors. In-Design Assistants reduce design iterations by catching physical and electrical errors before signoff verification. Template Assistants help designers to apply previous layout decisions to new designs, while Co-Design Assistants combine IC Compiler and Custom Compiler into a unified solution for custom and digital implementation.
Custom Compiler has been used internally by Synopsys since mid 2015. “We’ve been using it to build IP for the 10nm node,” Reed said. “We’ve measured the results and found the typical cell creation time was reduced from one hour to five minutes.”
Reed also noted the solution was not only focused at FinFET based designs. “It’s compelling for analogue designers working, for example, on FD-SOI based products.”
Custom Compiler is already in use for production work on the most advanced nodes and is supported on FinFET process technologies by leading foundries. Other early adopters include STMicroelectronics and memory developer GSI.
Pic: Custom Complier feature visually assisted automation
Author
Graham Pitcher
Source: www.newelectronics.co.uk