Altera has unveiled the industry’s first heterogeneous System-in-Package (SiP) devices that integrate stacked High-Bandwidth Memory (HBM2) from SK Hynix with Stratix 10 FPGAs and SoCs. Stratix 10 DRAM SiP represents a class of devices that is specifically architected to meet the most demanding memory bandwidth requirements in high-performance systems.
Stratix 10 DRAM SiP is claimed to offer over 10X higher memory bandwidth relative to discrete DRAM solutions that are currently available. This level of bandwidth is required in data centre, broadcast, wireline networking and high-performance computing systems, which are processing an ever-increasing amount of data.
Danny Biran, senior vice president of corporate strategy and marketing at Altera, said: “Supporting higher memory bandwidth requirements is one of the biggest challenges many of our customers face as they implement more computationally intensive tasks in their systems. Altera is in a unique position to serve these system requirements by combining the industry’s highest performance FPGA with High-Bandwidth Memory in a single package.”
Altera claims to be the first company to integrate this 3D stacked memory technology alongside an FPGA. Stratix 10 DRAM SiP is said to enable users to customise their workloads and achieve the highest memory bandwidth in a power-efficient manner.
Author
Tom Austin-Morgan
Source: www.newelectronics.co.uk